Enhancing RTL Optimization through Verified E-Graph Rewriting (Collaboration between Intel and Imperial College London)
Researchers from both Intel Corporation and Imperial College London collaborated on a technical paper titled “ROVER: RTL Optimization via Verified Electronic Graphics Rewriting.” The paper discusses the challenges in manual RTL design and optimization in the semiconductor industry, emphasizing the limitations of business logic and high-level synthesis tools compared to human designs. The researchers developed … Read more