According to the company, it can create more direct die-to-die interconnects by stacking the silicon dies face-to-face (F2F) before bonding them together directly, reducing the distances between the computing, memory, and I/O chips in the package and removing the TSVs between them. The arrangement creates a high-density interconnect that can sling 10X more signals between silicon dies with minimal noise and stronger mechanical robustness. They consume 10X less power than the PHYs that
Broadcom Bets on 3.5D Packaging Technology to Build Bigger AI Chips
