Synopsys Expedites Chip Innovation with Fully-Prepared Multi-Die Reference Flow for Intel Foundry

Synopsys Expedites Chip Innovation with Fully-Prepared Multi-Die Reference Flow for Intel Foundry


Synopsys has announced the availability of its multi-die reference flow for Intel Foundry’s EMIB packaging technology. This flow, powered by Synopsys.ai EDA Package and Synopsys IP, enables a unified co-design and analysis solution for multi-die designs. The 3DIC compiler from Synopsys supports efficient inter-die connectivity and high memory bandwidth requirements. This collaboration aims to accelerate the development of multi-die designs for high-performance computing and artificial intelligence applications.

Sanjay Bali, vice president of strategy and product management at Synopsys EDA Group, emphasized the increasing demand for multi-die designs to meet bandwidth requirements. The collaboration with Intel Foundry aims to provide customers with a comprehensive solution for developing complex systems with high processing power.

Suk Lee, vice president and general manager of the Ecosystem Technology Office at Intel Foundry, highlighted the need for a holistic approach to address the design and packaging complexities of multi-die architectures. The combination of Intel Foundry’s advanced packaging technologies and Synopsys’ multi-die reference flow offers designers a scalable solution for rapid heterogeneous integration using EMIB technology.

The AI and IP-driven EDA reference flow from Synopsys enables early architecture exploration, die package co-design, die-to-die connectivity, and system validation. The integration of Ansys® RedHawk-SC Electrothermal™ Multiphysics Technology with the 3DIC compiler addresses critical thermal and power clearance issues in multi-die designs. Additionally, Synopsys offers AI-powered optimization solutions for system performance and quality.

Synopsys is developing IP for Intel Foundry process technologies to support multi-die packages and accelerate time to market with reduced integration risk. The combination of Synopsys IP and the 3DIC Compiler can improve result quality and reduce effort compared to traditional manual flows.

The reference flow is now available for Intel Foundry customers, providing a comprehensive solution for multi-die designs. Synopsys aims to drive innovation in the semiconductor industry by offering complete silicon for system design solutions.

For more information, visit www.synopsys.com or contact Kelli Wheeler at [email protected]

Test results from February 2024 have shown that automated flows using Synopsys IP and 3DIC Compiler can lead to improved efficiency and result quality compared to manual flows. This collaboration between Synopsys and Intel Foundry aims to accelerate the development of multi-die designs for advanced computing applications.

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