By Mohamed Abdel-Kareem
Publication Date: 2026-11-06 00:41:00
Hardware and supercomputing leaders IBM (NYSE: IBM), the Quantum Science Center (QSC) at Oak Ridge National Laboratory (ORNL), and AMD (NASDAQ: AMD) have launched a dedicated quantum error correction (QEC) co-design platform at IBM’s facility in Poughkeepsie, New York. Designed to eliminate network latency bottlenecks between heterogeneous compute tiers, the deployment co-locates IBM’s latest 120-qubit Quantum Nighthawk r2 processor with ORNL’s Umbra high-performance computing (HPC) system, powered by AMD Instinct MI355X accelerators and 5th Gen AMD EPYC CPUs.
| IBM / ORNL / AMD QEC Co-Design Platform Specifications | ||
|---|---|---|
| Architecture Pillar | Hardware & Infrastructure Profile | Technical & Operational Function |
| Quantum Compute Tier | IBM Quantum Nighthawk r2 | 120 programmable qubits in a square lattice with dynamic mid-circuit measurement and fast reset. |
| Classical Accelerator Tier | ORNL Umbra HPC System | AMD Instinct MI355X GPUs and 5th Gen AMD EPYC CPUs providing… |