Intel’s upcoming 800-series chipsets are undergoing significant changes, with the B860 chipset losing 10 PCIe lanes from the chipset and additional lanes from the CPU and DMI interface. This results in the loss of branching, PCIe RAID, and a limited number of USB ports. On the other hand, the H810 chipset is quite basic, with minimal CPU PCIe lanes and limited USB ports.
The shift to PCIe 5.0 is evident across the entire 800 series chipset range, with a dedicated PCIe 5.0 x4 interface expected in chipsets from the B860 onwards. This interface is likely to be used for an M.2 slot. However, Intel’s HSIO design means that some resources will be shared with SATA and Ethernet, impacting the accessibility of all PCIe lanes.
Despite the potential improvements in speed and connectivity, there are concerns about the shared nature of USB ports across all platforms and the fuzzy details surrounding the support for Thunderbolt 4/USB4 ports. It is essential to note that not all PCIe lanes will be accessible due to resource sharing.
The details of these upcoming chipsets were leaked and the changes indicate a potential upgrade in performance and connectivity options. However, the shared resources and limitations in certain aspects raise questions about the overall impact on user experience. Intel’s move towards PCIe 5.0 across the chipset range signifies a step towards faster data transmission but the implications of resource sharing need to be considered for a comprehensive evaluation.
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https://hardforum.com/threads/intels-upcoming-800-series-chipsets-leak-in-detail.2035758/post-1045910861