By Rohail Saleem
Publication Date: 2026-01-08 20:36:00
Up until recently, Apple and NVIDIA maintained neat and clearly delineated orbits within TSMC’s sprawling fabs, with the former leveraging the fab giant’s leading-edge process and InFO (Integrated Fan-Out) packaging tech for its A-series processors, while the latter continuing to utilize TSMC’s older-gen process alongside CoWoS (Chip-on-Wafer-on-Substrate) packaging technology for its GPUs.
Yet, as both Apple and NVIDIA adopt a more aggressive design language for their bespoke chips, their heretofore neat orbits within TSMC are increasingly likely to come into a titanic crash, with lucrative opportunities for Intel and Samsung in the offing.
Apple, with either the M5 Ultra or the M6 Ultra chip, is likely to compete for the same 3D packaging resources at TSMC as the ones used by NVIDIA
Apple has been using InFO-PoP packaging technology for its A-series chips, where the DRAM is mounted directly on top of the SoC. However, as we noted in a recent post, Apple is expected to switch to WMCM packaging for its upcoming A20 chips, allowing for the integration of multiple individual dies – such as the CPU, GPU, and the Neural Engine – onto a single package, which provides an unprecedented level of flexibility due to the sheer number of die configurations that then become available.
Concurrently, Apple appears to be opting for TSMC’s SoIC-MH packaging technology for its upcoming M5 Pro and M5 Max chips. For the benefit of those who might not be…
